IP3 2022 – Memory (LOT 13938)
This lot is generally related to a technique to securely store and determine errors in a semiconductor device of a computer system. Techniques are disclosed to identify defects in a region of a memory by comparing detected defects with a previously created defect map, associate with the memory and store in another memory. The system confirms the memory’s identity if the defects are matched with the previously created defect map and denies the identity if the defects do not match. A patent in the portfolio discloses a technique to store the mapped defect map in a second memory using the stored defect map and uniquely identifies the memory using the unique identification for security purposes between the memory drive and second memory. The technology may be implemented in memory fault detection systems, memory identification systems, etc.